The invention relates to an integrated circuit having insulated gate field effect transistors, this circuit comprising first and second inverting amplifiers, the first amplifier comprising first and second transistors which are connected in series between a first and a second supply terminal and are controlled in phase opposition, a junction between the first and the second transistor being connected via a first capacitance to the gate electrode of the first transistor, which gate electrode is further connected to an output of the second amplifier, the gate electrode of the second transistor being connected to a gate electrode of a third transistor of the second amplifier receiving an input signal.
Such a logic circuit is known from I.E.E.E. Journal of Solid State Circuits, Vol. SC-16, No. 3, June 1981, p. 187-8, in which the second amplifier included in the circuit is connected via a transistor of the depletion type to the supply voltage V.sub.DD and via the gate electrode of this transistor to an input of the circuit. At a "high" input signal, the capacitance in the feedback circuit is charged from the output of the first amplifier (which provides a "low" signal) to the gate electrode of the first transistor of this amplifier via the transistor of the depletion type. When the input signal varies from "high" to "low", the output signal of the first amplifier varies from "low" to "high", while due to the capacitive feedback (bootstrapping) to the gate electrode of the first transistor thereof the output signal becomes equal to the supply voltage (V.sub.DD) or lies above the supply voltage V.sub.DD minus the threshold voltage of the first transistor (V.sub.TH). Due to the "low" input signal, the transistor of the depletion type would have to be fully cut off. This transistor remains slightly conducting, however, so that the capacitive feedback does not operate to the optimum.